make(1)

NAME

make —
maintain program
dependencies

Typical Use

make is typically used to build executable programs and libraries from source code. Generally speaking, make is applicable to any process that involves executing arbitrary commands to transform a source file to a target result. For example, make could be used to detect a change made to an image file (the source) and the transformation actions might be to convert the file to some specific format, copy the result into a content management system, and then send e-mail to a predefined set of users that the above actions were performed.

make is invoked with a list of target file names to build as command-line arguments:

make [TARGET …]

Without arguments, make builds the first target that appears in its makefile, which is traditionally a target named all.

make decides whether a target needs to be regenerated by comparing file modification times. This solves the problem of avoiding the building of files that are already up to date, but it fails when a file changes but its modification time stays in the past. Such changes could be caused by restoring an older version of a source file, or when a network filesystem is a source of files and its clock or timezone is not synchronized with the machine running make. The user must handle this situation by forcing a complete build. Conversely, if a source file’s modification time is in the future, it may trigger unnecessary rebuilding.

SYNOPSIS

make[-BeiknpqrSst] [-Cdirectory] [-Dvariable] [-dflags] [-fmk] [-Idirectory] [-jmax_processes] [-mdirectory] [-Vvariable] [NAME=value] [target …]

DESCRIPTION

make is a program designed to simplify the
maintenance of other programs. Its input is a makefile: a
list of specifications (target rules) describing build relationships between
programs and other files. By default, the file
makefile is used; if no such file is found, it tries
Makefile. If neither of these exist,
make can still rely on a set of built-in system
rules.

If the file ‘.depend’
exists, it will also be read after the main makefile
(see mkdep(1)).

The handling of ‘.depend’ is
a BSD extension.

If a list of target … is specified,
make will build those targets. Otherwise a default
target will be built: either a target explicitly marked with
.MAIN or the first target encountered in the
makefile.

Standard options are as follows:

-eEnvironment variables override macro assignments within makefiles.-fmkRead file mk instead of the default makefile. If
mk is ‘-’,
standard input is used. Multiple makefiles may be specified, and are read
in the order specified.-iIgnore non-zero exit of shell commands in the makefile. Equivalent to
specifying ‘-’ before each command
line in the makefile.-kContinue processing after errors are encountered, but only on those
targets that do not depend on the target whose creation caused the
error.-nDisplay the commands that would have been executed, but do not actually
execute them.-pPrint a dump of the target rules and variables on stdout. Do not build
anything.-qDo not execute any commands, but exit with status 0 if the specified
targets are up to date, and 1 otherwise.-rDo not use the built-in rules specified in the system makefile,
.-SStop processing when an error is encountered. This is the default
behavior. This is needed to negate the -k option
during recursive builds.-sDo not echo commands as they are executed. Equivalent to specifying
‘@’ before each command line in the
makefile.-tRather than re-building a target as specified in the makefile, create it
or update its modification time to make it appear up to date, a bit like
touch(1).NAME=valueSet the value of the variable NAME to
value.

Extended options are as follows:

-BTry to be backwards compatible by executing the commands to make the
prerequisites in a target rule in sequence. This is the default, in the
absence of -jmax_processes.-CdirectoryEnter directory before doing anything.-DvariableDefine variable to be 1.-dflagsTurn on debugging, and specify which portions of
make are to print debugging information.
flags is one or more of the following:
APrint all possible debugging information; equivalent to specifying all
of the debugging flags.aPrint debugging information about archive searching and caching.cPrint debugging information about conditional evaluation.dPrint debugging information about directory searching and
caching.DPrint warning messages about multiply defined command lists.ePrint debugging information about expensive command heuristics.fPrint debugging information about the expansion of for loops.g1Print the input graph before making anything.g2Print the input graph after making everything, or before exiting on
error.hPrint information about jobs being held back because of sibling/target
groups races.jPrint debugging information about forking processes to run
commands.kPrint debugging information about manually killing processes.lPrint commands in Makefile targets regardless of whether or not they
are prefixed by @. Also known as loud behavior.mPrint debugging information about making targets, including
modification dates.nPrint debugging information about target names equivalence
computations.pHelp finding concurrency issues for parallel make by adding some
randomization. If RANDOM_ORDER is defined,
targets will be shuffled before being built. If
RANDOM_DELAY is defined,
make will wait between 0 and ${RANDOM_DELAY}
seconds before starting a command. A given random seed can be forced
by setting RANDOM_SEED, but this does not
guarantee reproducibility.q‘quick death’ option: after a fatal error, instead of
waiting for other jobs to die, kill them right away.sPrint debugging information about inference (suffix) transformation
rules.tPrint debugging information about target list maintenance.TPrint debugging information about target group determination.vPrint debugging information about variable assignment.-IdirectorySpecify a directory in which to search for makefiles and for
“…”-style inclusions. Multiple directories can be added to
form a search path. Furthermore, the system include path (see the
-m option) will be used after this search
path.-jmax_processesSpecify the maximum number of processes that make
may have running at any one time.-mdirectorySpecify a directory in which to search for system include files:
sys.mk and <...>-style inclusions. Multiple
directories can be added to form the system search path. Using
-m will override the default system include
directory /usr/share/mk.-VvariablePrint make’s idea of the value of
variable. Do not build any targets. Multiple
instances of this option may be specified; the variables will be printed
one per line, with a blank line for each null or undefined variable.

There are seven different types of lines in a makefile: dependency
lines, shell commands, variable assignments, include statements, conditional
directives, for loops, and comments. Of these, include statements,
conditional directives and for loops are extensions.

A complete target rule is composed of a dependency line, followed
by a list of shell commands.

In general, lines may be continued from one line to the next by
ending them with a backslash (‘’).
The trailing newline character and initial whitespace on the following line
are compressed into a single space.

DEPENDENCY LINES

Dependency lines consist of one or more targets, an operator, and
zero or more prerequisites:

target
…:[prerequisite …]

This creates a relationship where the targets
“depend” on the prerequisites and are usually built from them.
The exact relationship between targets and prerequisites is determined by
the operator that separates them.

It is an error to use different dependency operators for the same
target.

The operators are as follows:

:A target is considered out of date if any of its prerequisites has been
modified more recently than the target (that is, its modification time is
less than that of any of its prerequisites). Thus, targets with no
prerequisites are always out of date.

make will then execute the list of
shell commands associated with that target.

Additional prerequisites may be specified over additional
dependency lines: make will consider all
prerequisites for determining out-of-date status. The target is removed
if make is interrupted.

!make first examines all prerequisites and
re-creates them as necessary.

It will then always execute the list of shell commands
associated with that target (as if the target always was out of
date).

Like :, additional prerequisites may
be specified over additional dependency lines, and the target is still
removed if make is interrupted.

::Each dependency line for a target is considered independently. A target is
considered out of date for this target rule if any of its prerequisites in
this dependency has been modified more recently than the target.

make will then execute the list of
shell commands associated with that target. Target rules that specify no
prerequisites are always executed.

The target will not be removed if make
is interrupted.

The : operator is the only
standard operator. The :: operator is a fairly
standard extension, popularized by
imake . The
! operator is a BSD
extension.

As an extension, targets and prerequisites may contain the shell
wildcard expressions ‘?’,
‘*’,
‘[]’ and
‘{}’. The expressions
‘?’,
‘*’ and
‘[]’ may only be used as part of the
final component of the target or prerequisite, and must be used to describe
existing files. The expression ‘{}’
need not necessarily be used to describe existing files. Expansion is in
directory order, not alphabetically as done in the shell.

For maximum portability, target names should only consist of
periods, underscores, digits and alphabetic characters.

The use of several targets can be a shorthand for duplicate rules.
Specifically,

target1 target2: reqa reqa
cmd1
cmd2

may be replaced with

target1: reqa reqa
cmd1
cmd2
target2: reqa reqa
cmd1
cmd2

in general. But make is aware of parallel
issues, and will not build those targets concurrently, if not
appropriate.

Warning

This man page is an extract of the documentation of GNU make. It is updated only
occasionally, because the GNU project does not use nroff. For complete, current documentation, refer to the Info file make.info which is made from the
Texinfo source file make.texi.

Macros

A makefile can contain definitions of macros. Macros are usually referred to as variables when they hold simple string definitions, like “CC=clang”, which would specify clang as the C compiler. Macros in makefiles may be overridden in the command-line arguments passed to the make utility. environment variables are also available as macros.

Macros allow users to specify the programs invoked and other custom behavior during the build process. For example, as just shown, the macro “CC” is frequently used in makefiles to refer to the location of a C compiler.

New macros are traditionally defined using capital letters:

MACRO = definition

A macro is used by expanding it. Traditionally this is done by enclosing its name inside $(). An equivalent form uses curly braces rather than parenthesis, i.e., ${}, which is the style used in BSD operating systems.

NEW_MACRO = $(MACRO)-$(MACRO2)

Macros can be composed of shell commands using the command substitution operator, denoted by backticks (“` `”).

YYYYMMDD = ` date `

The content of the definition is stored “as is”. Lazy evaluation is used, meaning that macros are normally expanded only when their expansions are actually required, such as when used in the command lines of a rule. For example:

PACKAGE = package
VERSION = ` date +”%Y.%m%d” `
ARCHIVE = $(PACKAGE)-$(VERSION)
dist:
# Notice that only now macros are expanded for shell to interpret:
# tar -cf package-`date +”%Y%m%d”`.tar
tar -zcf $(ARCHIVE).tar .

The generic syntax for overriding macros on the command line is:

make MACRO=”value” [MACRO=”value” …] TARGET [TARGET …]

Makefiles can access any of a number of predefined internal macros, with “?” and “@” being the most common.

target: component1 component2
echo $? contains those components, which need attention
(i.e., they ARE YOUNGER than current TARGET).
echo [email protected] evaluates to current TARGET name from among those left of the colon.

SHELL COMMANDS

Each target may have associated with it a series of shell
commands, normally used to build the target. While several dependency lines
may name the same target, only one of these dependency lines should be
followed by shell commands, and thus define a complete target rule (unless
the ‘::’ operator is used). Each of
the shell commands in the target rule
must be
preceded by a tab.

If a command line begins with a combination of the characters,
‘@’,
‘-’ and/or
‘+’, the command is treated
specially:

‘@’causes the command not to be echoed before it is executed.‘-’causes any non-zero exit status of the command line to be ignored.‘+’causes the command to be executed even if -n has
been specified. (This can be useful to debug recursive Makefiles.)

Commands are executed using /bin/sh in
“set -e” mode, unless ‘-’ is
specified.

As an optimization, make may execute very
simple commands without going through an extra shell process, as long as
this does not change observable behavior.

Other Elements

  • Single-line comments are started with the hash symbol (“#”).
  • Some directives in makefiles can include other makefiles.
  • Line continuation is indicated with a backslash (“”) character at the end of a line, as in the following:

target: component
component
command ;
command |
piped-command

Exit Status

GNU make exits with a status of:

  • 0 if all makefiles were successfully parsed and no targets that were built failed;
  • 1 if the -q flag was used and make determines that a target needs to be rebuilt; and
  • 2 if any errors were encountered.

Makefiles

make searches the current directory for the makefile to use. GNU make searches files for a file named one of GNUmakefile, makefile, and then Makefile, and runs the specified target(s) from that file.

The makefile language is similar to declarative programming, in which necessary end conditions are described but the order in which actions are to be taken is not important. This may be confusing to programmers used to imperative programming, which explicitly describes how the end result will be reached.

One problem in build automation is the tailoring of a build process to a given platform. For instance, the compiler used on one platform might not accept the same options as the one used on another. This is not well handled by make on its own. This problem is typically handled by generating separate platform-specific build instructions, which in turn may be processed by make. Common tools for this process are autoconf and cmake.

INFERENCE RULES

make also maintains a list of valid
suffixes through the use of the .SUFFIXES special
target.

These suffixes can be used to write generic transformation rules
called inference rules.

If a target has the form ‘.s1.s2’, where .s1 and .s2
are currently valid suffixes, then it defines a transformation from *.s1 to
*.s2 (double suffix inference). If a target has the form
‘.s1’, where .s1 is a currently valid suffix, then it defines
a transformation from *.s1 to * (single suffix inference).

A complete inference rule is a dependency line with such a target,
the normal dependency operator, no prerequisites and a list of shell
commands.

When make requires a target for which it
has no complete target rule, it will try to apply a single active inference
rule to create the target.

For instance, with the following Makefile, describing a C program
compiled from sources a.c and b.c, with хедер file a.h:

.SUFFIXES: .c .o
.c.o:
${CC} ${CFLAGS} -c $Consider b.o: there is a complete target rule re-creating it from
b.c, so it will be compiled using ${CC} -DFOO.

Consider a.o: there is no explicit target rule, so
make will consider valid transforms. Fortunately,
there is an inference rule that can create a.o from a.c, so it will be
compiled using ${CC}.

Note that extra prerequisites are still taken into account, so
both a.o and b.o depend on a.h for re-creation.

Valid suffixes accumulate over .SUFFIXES
lines. An empty .SUFFIXES can be used to reset the
currently valid list of suffixes, but inference rules already read are still
known by make, and they are marked as inactive.
Redefining the corresponding suffix (or suffixes) will reactivate the
rule.

In case of duplicate inference rules with the same suffix
combination, the new rule overrides the old one.

For maximal portability, suffixes should start with a dot.

Syntax

make [ -f makefile ] [ options ] … [ targets ] …

Options

-b, -mThese options are ignored, but included for compatibility with other versions of make.
-B, –always-makeUnconditionally make all targets.
-Cdir, –directory=dirChange to directory dir before reading the makefiles or doing anything else. If multiple -C options are specified, each is interpreted relative to the previous one: -C / -C etc is equivalent to -C /etc. This is typically used with recursive invocations of make.
-dPrint debugging information in addition to normal processing. The debugging information says which files are being considered for remaking, which file-times are being compared and with what results, which files actually need to be remade, which implicit rules are considered and that are applied; everything interesting about how make decides what to do.
–debug[=FLAGS]Print debugging information in addition to normal processing. If the FLAGS are omitted, then the behavior is the same as if -d was specified. FLAGS may be a for all debugging output (same as using -d), b for basic debugging, v for more verbose basic debugging, i for showing implicit rules, j for details on invocation of commands, and m for debugging while remaking makefiles.
-e,
–environment-overrides
Give variables taken from the environment precedence over variables from makefiles.
-ffile, –file=file,
–makefile=file
Use file as a makefile.
-i, –ignore-errorsIgnore all errors in commands executed to remake files.
-Idir, –include-dir=dirSpecifies a directory dir to search for included makefiles. If several -I options are used to specify several directories, the directories are searched in the order specified. Unlike the arguments to other flags of make, directories given with -I flags may come directly after the flag: -Idir is allowed, as well as -Idir. This syntax is allowed for compatibility with the C preprocessor’s -I flag.
-j [jobs], –jobs[=jobs]Specifies the number of jobs (commands) to run simultaneously. If there is more than one -j option, the last one is effective. If the -j option is given without an argument, make will not limit the number of jobs that can run simultaneously.
-k, –keep-goingContinue as much as possible after an error. While the target that failed (and those that depend on it) cannot be remade, the other dependencies of these targets can be processed all the same.
-l [load],
–load-average[=load]
Specifies that no new jobs (commands) should be started if there are others jobs running and the load average is at least load (a floating-point number). With no argument, removes a previous load limit.
-L,
–check-symlink-times
Use whichever is the latest modification time between symlinks and target.
-n, –just-print,
–dry-run, –recon
Print the commands that would be executed, but do not execute them.
-ofile, –old-file=file,
–assume-old=file
Do not remake the file file even if it is older than its dependencies, and do not remake anything on account of changes in file. Essentially the file is treated as very old and its rules are ignored.
-p, –print-data-basePrint the database (rules and variable values) that results from reading the makefiles; then execute as usual or as otherwise specified. This also prints the version information given by the -v switch (see below). To print the database without trying to remake any files, use make -p -f/dev/null.
-q, –question“Question mode.” Do not run any commands, or print anything; just return an exit status that is zero if the specified targets are already up to date, nonzero otherwise.
-r, –no-builtin-rulesEliminate use of the built-in implicit rules. Also, clear out the default list of suffixes for suffix rules.
-R, –no-builtin-variablesDon’t define any built-in variables.
-s, –silent, –quietSilent operation; do not print the commands as they are executed.
-S, –no-keep-going,
–stop
Cancel the effect of the -k option. This is never necessary except in a recursive make where -k might be inherited from the top-level make via MAKEFLAGS or if you set -k in MAKEFLAGS in your environment.
-t, –touchTouch files (mark them up to date without really changing them) instead of running their commands. This is used to pretend that the commands were done, to fool future invocations of make.
-v, –versionPrint the version of make; also a Copyright, a list of authors and a notice that there is no warranty.
-w, –print-directoryPrint a message containing the working directory before and after other processing. This may be useful for tracking down errors from complicated nests of recursive make commands.
–no-print-directoryTurn off -w, even if it was turned on implicitly.
-Wfile, –what-if=file,
–new-file=file,
–assume-new=file
Pretend that the target file has just been modified. When used with the -n flag, this shows you what would happen if you were to modify that file. Without -n, it is almost the same as running a touch command on the given file before running make, except that the modification time is changed only internally within make.
–warn-undefined-variablesWarn when an undefined variable is referenced.

Options

-b, -mThese options are ignored for compatibility with other versions of make.
-B, –always-makeUnconditionally make all targets.
-Cdir, –directory=dirChange to directory dir before reading the makefiles or doing anything else. If multiple -C options are specified, each is interpreted
relative to the previous one: -C / -C etc is equivalent to -C /etc. This is typically used with recursive invocations of make.
-dPrint debugging information in addition to normal processing. The debugging information says which files are being considered for remaking, which
file-times are being compared and with what results, which files actually need to be remade, which implicit rules are considered and which are
applied—everything interesting about how make decides what to do.
–debug[=FLAGS]Print debugging information in addition to normal processing. If the FLAGS are omitted, then the behavior is the same as if -d was specified.
FLAGS may be a for all debugging output (same as using -d), b for basic debugging, v for more verbose basic debugging,
i for showing implicit rules, j for details on invocation of commands, and m for debugging while remaking makefiles.
-e,–environment-overridesGive variables taken from the environment precedence over variables from makefiles.
+-ffile, –file=file, –makefile=FILEUse file as a makefile.
-i, –ignore-errorsIgnore all errors in commands executed to remake files.
-Idir, –include-dir=dirSpecifies a directory dir to search for included makefiles. If several -I options are used to specify several directories, the directories
are searched in the order specified. Unlike the arguments to other flags of make, directories given with -I flags may come directly after the
flag: -Idir is allowed, as well as -Idir. This syntax is allowed for compatibility with the C preprocessor’s -I flag.
-j [jobs], –jobs[=jobs] Specifies the number of jobs (commands) to run simultaneously. If there is more than one -j option, the last one is effective. If the
-j option is given without an argument, make will not limit the number of jobs that can run simultaneously.
-k, –keep-goingContinue as much as possible after an error. While the target that failed, and those that depend on it, cannot be remade, the other dependencies of these
targets can be processed all the same.
-l [load], –load-average[=load] Specifies that no new jobs (commands) should be started if there are others jobs running and the load average is at least load (a floating-point
number). With no argument, removes a previous load limit.
-L, –check-symlink-timesUse the latest mtime between symlinks and target.
-n, –just-print, –dry-run, –reconPrint the commands that would be executed, but do not execute them.
-ofile, –old-file=file, –assume-old=fileDo not remake the file file even if it is older than its dependencies, and do not remake anything on account of changes in file. Essentially
the file is treated as very old and its rules are ignored.
-p, –print-data-basePrint the data base (rules and variable values) that results from reading the makefiles; then execute as usual or as otherwise specified. This also prints
the version information given by the -v switch (see below). To print the data base without trying to remake any files, use make -p
-f/dev/null.-q, –question”Question mode”. Do not run any commands, or print anything; just return an exit status that is zero if the specified targets are already up to date,
nonzero otherwise.
-r, –no-builtin-rulesEliminate use of the built-in implicit rules. Also clear out the default list of suffixes for suffix rules.
-R, –no-builtin-variablesDon’t define any built-in variables.
-s, –silent, –quietSilent operation; do not print the commands as they are executed.
-S, –no-keep-going, –stopCancel the effect of the -k option. This is never necessary except in a recursive make where -k might be inherited from the top-level
make via MAKEFLAGS or if you set -k in MAKEFLAGS in your environment.
-t, –touchTouch files (mark them up to date without really changing them) instead of running their commands. This is used to pretend that the commands were done, in
order to fool future invocations of make.
-v, –versionPrint the version of the make program plus a copyright, a list of authors and a notice that there is no warranty.
-w, –print-directoryPrint a message containing the working directory before and after other processing. This may be useful for tracking down errors from complicated nests of
recursive make commands.
–no-print-directoryTurn off -w, even if it was turned on implicitly.
-Wfile, –what-if=file, –new-file=file, –assume-new=filePretend that the target file has just been modified. When used with the -n flag, this shows you what would happen if you were to modify that
file. Without -n, it is almost the same as running a touch command on the given file before running make, except that the modification
time is changed only in the imagination of make.
–warn-undefined-variablesWarn when an undefined variable is referenced.

VARIABLE ASSIGNMENTS

Variables in make are much like variables
in the shell and, by tradition, consist of all upper-case letters. They are
also called ‘macros’ in various texts. For portability, only
periods, underscores, digits and letters should be used for variable names.
The following operators can be used to assign values to variables:

=Assign the value to the variable. Any previous value is overridden.:=Assign with expansion, i.e., expand the value before assigning it to the
variable (extension).+=Append the value to the current value of the variable (extension).?=Assign the value to the variable if it is not already defined
(BSD extension). Normally, expansion is not done
until the variable is referenced.!=Perform variable expansion and pass the result to the shell for execution
on the spot, assigning the result to the variable. Any newlines in the
result are also replaced with spaces (BSD
extension).!!=Perform variable expansion on the spot and pass the result to the shell
for execution only when the value is needed, assigning the result to the
variable.

This is almost identical to != except
that a shell is only run when the variable value is needed. Any newlines
in the result are also replaced with spaces
(OpenBSD extension).

Any whitespace before the assigned value is
removed; if the value is being appended, a single space is inserted between
the previous contents of the variable and the appended value.

Several extended assignment operators may be combined together.
For instance,

A ?!= cmd

will only run “cmd” and put its output into
A if A is not yet defined.

Combinations that do not make sense, such as

A +!!= cmd

will not work.

Variables are expanded by surrounding the variable name with
either curly braces (‘{}’) or
parentheses (‘()’) and preceding it
with a dollar sign (‘$’). If the
variable name contains only a single letter, the surrounding braces or
parentheses are not required. This shorter form is not recommended.

Variable substitution occurs at distinct times, depending on the
type of line. Variables in dependency lines, conditional directives and
include statements are expanded as the line is read. Variables in shell
commands are expanded when the shell command is executed.

The four different classes of variables (in order of increasing
precedence) are:

Environment variablesVariables defined as part of make’s
environment.Global variablesVariables defined in the makefile or in included makefiles.Command line variablesVariables defined as part of the command line.Local variablesVariables that are defined specific to a certain target. Standard local
variables are as follows:
@The name of the target.%The name of the archive member (only valid for library rules).!The name of the archive file (only valid for library rules).?The list of prerequisites for this target that were deemed out of
date.

The six variables ‘@F’,
‘@D’,

For maximum compatibility,
‘<’ should only be used for actual inference rules. It is also set for normal target rules when there is an inference rule that matches the current target and prerequisite in scope. That is, in

.SUFFIXES: .c .o
file.o: file.c
cmd1 $<.c.o: cmd2

building file.o will execute
“cmd1 file.c”.

As an extension, make supports the
following local variables:

>The list of all prerequisites for this target..ALLSRCSynonym for ‘>’..ARCHIVESynonym for ‘!’..IMPSRCSynonym for ‘<’..MEMBERSynonym for ‘%’..OODATESynonym for ‘?’..PREFIXSynonym for ‘*’..TARGETSynonym for ‘@’.

These variables may be used on the dependency half of
dependency lines, when they make sense.

In addition, make sets or knows about the
following internal variables, or environment variables:

$A single dollar sign ‘$’, i.e.,
‘$$’ expands to a single dollar
sign..MAKEThe name that make was executed with
(argv[0])..CURDIRA path to the directory where make was
executed..OBJDIRPath to the directory where targets are built. At startup,
make searches for an alternate directory to place
target files. make tries to
chdir(2)
into MAKEOBJDIR (or obj if
MAKEOBJDIR is not defined), and sets
.OBJDIR accordingly. Should that fail,
.OBJDIR is set to
.CURDIR.MAKEFILE_LISTThe list of files read by make..MAKEFLAGSThe environment variable MAKEFLAGS may contain
anything that may be specified on make’s command
line. Its contents are stored in make’s
.MAKEFLAGS variable. Anything specified on
make’s command line is appended to the
.MAKEFLAGS variable which is then entered into the
environment as MAKEFLAGS for all programs which
make executes.MFLAGSA shorter synonym for .MAKEFLAGS.PWDAlternate path to the current directory. make
normally sets ‘.CURDIR’ to the
canonical path given by getcwd(3). However, if the environment variable
PWD is set and gives a path to the current
directory, then make sets
‘.CURDIR’ to the value of
PWD instead. PWD is always
set to the value of ‘.OBJDIR’ for all
programs which make executes..TARGETSList of targets make is currently building.MACHINEName of the machine architecture make is running
on, obtained from the MACHINE environment
variable, or through uname(3) if not defined.MACHINE_ARCHName of the machine architecture make was compiled
for, obtained from the MACHINE_ARCH environment
variable, or defined at compilation time.MACHINE_CPUName of the machine processor make was compiled
for, obtained from the MACHINE_CPU environment
variable, or defined at compilation time. On processors where only one
endianness is possible, the value of this variable is always the same as
MACHINE_ARCH.MAKEFILEPossibly the file name of the last makefile that has been read. It should
not be used; see the BUGS section
below.

Variable expansion may be modified to select or modify each word
of the variable (where “word” is a whitespace delimited
sequence of characters). The general format of a variable expansion is as
follows:

{variable[:modifier[:…]]}

Each modifier begins with a colon and one of the following special
characters. The colon may be escaped with a backslash
(‘’).

:EReplaces each word in the variable with its suffix.:HReplaces each word in the variable with everything but the last
component.:LReplaces each word in the variable with its lower case equivalent.:UReplaces each word in the variable with its upper case equivalent.:MpatternSelect only those words that match the rest of the modifier. The standard
shell wildcard characters (‘*’,
‘?’, and
‘[]’) may be used. The wildcard
characters may be escaped with a backslash
(‘’).:NpatternThis is identical to :M, but selects all words
which do not match the rest of the modifier.:QQuotes every shell meta-character in the variable, so that it can be
passed safely through recursive invocations of
make.:QLQuote list: quotes every shell meta-character in the variable, except
whitespace, so that it can be passed to a shell’s ‘for’
loops.:RReplaces each word in the variable with everything but its suffix.:S/old_string/new_string/[1g] Modify the first occurrence of old_string in the
variable’s value, replacing it with new_string. If a
‘g’ is appended to the last slash of
the pattern, all occurrences in each word are replaced. If a
‘1’ is appended to the last slash of
the pattern, only the first word is affected. If
old_string begins with a caret
(‘^’),
old_string is anchored at the beginning of each
word. If old_string ends with a dollar sign
(‘$’), it is anchored at the end of
each word. Inside new_string, an ampersand
(‘&’) is replaced by
old_string (without any
‘^’ or
‘$’). Any character may be used as a
delimiter for the parts of the modifier string. The anchoring, ampersand
and delimiter characters may be escaped with a backslash
(‘’).

Variable expansion occurs in the normal fashion inside both
old_string and new_string
with the single exception that a backslash is used to prevent the
expansion of a dollar sign (‘$’),
not a preceding dollar sign as is usual.

:C/pattern/replacement/[1g] The :C modifier is just like the
:S modifier except that the old and new strings,
instead of being simple strings, are an extended regular expression (see
re_format(7)) and an ed(1)-style replacement string. Normally, the first
occurrence of the pattern in each word of the value is changed. The
‘1’ modifier causes the substitution
to apply to at most one word; the
‘g’ modifier causes the substitution
to apply to as many instances of the search pattern as occur in the word
or words it is found in. Note that
‘1’ and
‘g’ are orthogonal; the former
specifies whether multiple words are potentially affected, the latter
whether multiple substitutions can potentially occur within each affected
word.:TReplaces each word in the variable with its last component.:old_string=new_stringThis is the AT&T System V UNIX style
variable substitution. It must be the last modifier specified. If
old_string or new_string do
not contain the pattern matching character ‘%’ then it is
assumed that they are anchored at the end of each word, so only suffixes
or entire words may be replaced. Otherwise ‘%’ is the
substring of old_string to be replaced in
new_string. The right hand side
(new_string) may contain variable values, which will
be expanded. To put an actual single dollar, just double it.

All modifiers are BSD extensions, except
for the standard AT&T System V UNIX style
variable substitution.

The interpretation of ‘%’ and ‘$’ in
AT&T System V UNIX variable substitutions
is not mandated by POSIX, though it is fairly common.

Источники

  • https://man.openbsd.org/make
  • https://www.computerhope.com/unix/umake.htm
  • https://linux.die.net/man/1/make
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